PI2121 datasheet(19/21 Pages) VICOR

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Picor Corporation • picorpower.com

PI2121

Rev. 1.2 Page 19 of 21

Layout Recommendation:

Use the following general guidelines when designing

printed circuit boards. An example of the typical

land pattern for the PI2121 is shown in Figure 24:

•

Make sure to have a solid ground (return) plane

to reduce circuit parasitic.

•

Connect all S pads together with a wide trace to

reduce trace parasitics to accommodate the high

current input, and also connect all D pads

together with a wide trace to accommodate the

high current output.

•

Connect the SP pin to the S pins and connect

the SN pin to D pins as shown in Figure 24.

•

Use 1oz of copper or thicker if possible to

reduce trace resistance and reduce power

dissipation.

•

The VC bypass capacitor should be located as

close as possible to the VC and GND pins.

Place the PI2121 and bypass capacitor on the

same layer of the board. The VC pin and CVC

(shown as C2 in Figure 24).

•

Keep the power source very close to the S input

pins, any parasitic in the trace connecting the

power source and S pins will have inductive kick

back when there is high current flow in the trace

and the MOSFET turns off due to reverse

current fault conditions. The inductive kick back

will produce a high voltage across the MOSFET.

If it is not possible to connect the power source

and S pins with a very short trace or common

point, connect a capacitor (shown as C5 in

figure 24), recommended value 1µF, close to the

S pins and return (ground). Also for the same

reason use C7 in figure 24 at the output.

Figure 25: PI2121 Mounted on PI2121-EVAL1

Please visit www.picorpower.com for information on PI2121-EVAL1

Figure 24: PI2121 layout recommendation

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