| 전자부품 데이터시트 검색엔진 |
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INA159-EP 데이터시트(PDF) 4 Page - Texas Instruments |
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INA159-EP 데이터시트(HTML) 4 Page - Texas Instruments |
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4 / 19 page ![]() INA159 SBOS333B − JULY 2005 − REVISED OCTOBER 2005 www.ti.com 4 20k Ω 40k Ω 100k Ω 2 3 7 5 OUT 1 8 6 V+ 4 V − +5V 100k Ω 40k Ω INA159 The test is performed by measuring the output with the reference appliedtoalternate reference resistors, and calculating a result such that the amplifier offset is cancelled in the final measurement. Figure 2. Test Circuit for Reference Divider Accuracy TYPICAL CHARACTERISTICS At TA = +25°C, RL = 10kΩ connected to VS/2, REF pin 1 connected to ground, and REF pin 2 connected to VREF = 5V, unless otherwise noted. OFFSET VOLTAGE PRODUCTION DISTRIBUTION Offset Voltage ( µV) OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION Offset Voltage Drift ( µV/_C) GAIN vs FREQUENCY Frequency (Hz) 0 −10 −20 −30 −40 −50 100 1k 10k 100k 1M 10M 10 POWER−SUPPLY REJECTION RATIO vs FREQUENCY Frequency (Hz) 130 120 110 100 90 80 70 60 50 40 30 20 10 0 −10 100 1k 10k 100k 1M 10M 10 |
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