INN

GATE INP/VSS

LM5051

LINE

VCC

RBIAS

0.1 F

LM5051

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SNVS702D – OCTOBER 2011 – REVISED MARCH 2013

Several factors can prevent the nFGD pin from indicating that the external MOSFET is operating normally. If the

LM5051 is used to connect parallel, redundant power supplies, one of the connected supplies may hold the

INP/VSS pin voltage close enough to the LM5051 INN pin voltage that the VSD(TST) threshold is not exceeded.

Additionally, operating with a high output capacitance value and low output load current may require a significant

amount of time before the output load capacitance is discharged to the point where the VSD(TST) threshold is

crossed and the nFGD pin switches.

The status of the nFGD pin does not depend on the status of the OFF pin. The status of the nFGD pin depends

only on the voltage at the INN pin relative to the INP/VSS pin being above, or below, the VSD(TST) threshold

voltage.

The nFGD output pin requires pull-up to an external voltage source, and must not be pulled higher than 5.5V

above the INP/VSS pin. It is recommended that the nFGD pin is not required to sink more than 2mA.

VCC PIN

The VCC pin is connected to the cathode of the internal shunt (zener) voltage regulator. The anode of the shunt

regulator is connected to the INP/VSS pin. The VCC pin provides bias for internal circuitry, as well as gate drive

to the external MOSFET. The VCC pin should always be bypassed with a 0.1

μF ceramic capacitor to the

INP/VSS pin.

Typically, the VCC pin is biased from the LINE pin, through the internal 50 k

Ω series resistor, when the available

VLINE voltage is not less than the 36V minimum operating voltage.

If the available LINE voltage is less than less than the 36V minimum operating voltage the VCC pin can be

biased through the use of an external resistor to an appropriate bias supply that is referenced to the INP/VSS

pin.

A minimum VCC pin bias current of 1 mA is recommended, with a recommended 10 mA maximum.

A design example for calculating the external resistor where the VCC pin will be biased from an 18V to 36V

supply (relative to the INP/VSS pin):

RBIAS = (VBIAS(MIN) - VZ) / IBIAS(MIN)

(1)

RBIAS = (18V - 13V) / 1 mA

(2)

RBIAS = 5.0 kΩ

(3)

Next, using the calculated RBIAS resistor value, verify that the VCC pin current will be no more than 10mA at the

maximum VBIAS voltage:

ICC = (VBIAS(MAX) - 13V) / RBIAS

(4)

ICC = (36V - 13V) / 5.0 k

Ω

(5)

ICC = 4.6 mA

(6)

Since the calculated 4.6 mA is less than the 10 mA maximum, the 5 k

Ω value for RBIAS is acceptable.

Figure 29. Using an External Resistor to Bias the VCC Pin

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