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LP3470A 데이터시트(PDF) 4 Page - Texas Instruments

부품명 LP3470A
상세설명  LP3470A Ultra Low Power Voltage Supervisor With Programmable Delay and 1% Reset Threshold
PDF  23 Pages
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

LP3470A 데이터시트(HTML) 4 Page - Texas Instruments

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1
RESET
2
VCC
3
GND
4
5
SRT
Not to scale
SOT-23 (5)
DBV (5)
Top View
VCC1
4
LP3470A
SNVSBF5C – JULY 2019 – REVISED MAY 2020
www.ti.com
Product Folder Links: LP3470A
Submit Documentation Feedback
Copyright © 2019–2020, Texas Instruments Incorporated
6 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
1
SRT
I
Set reset time-out. Connect a capacitor between this pin and ground to select the reset time-out period (tD).
tD = 619 × C1 (CSRT in µF and tD in ms). If no capacitor is connected, leave this pin floating.
2
GND
—
Ground pin.
3
VCC1
I
Can be connected to VCC or left floating. DO NOT CONNECT TO GND.
4
VCC
I
Supply voltage, and reset threshold monitor input.
5
RESET
O
Open-drain, active-low reset output. Connect to an external pullup resistor. RESET changes from high to low
whenever the monitored voltage (VCC) drops below the reset threshold voltage (VIT-). Once VCC exceeds
the reset threshold (VIT-) + hysteresis (VHYS), RESET remains low for the reset time-out period (tD) and then
deasserts to logic high.



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