5.6 I2C Interface (SCL and SDA Pins) Timing Requirements

See(1)

MIN

NOM

MAX

UNIT

tHOLD

Hold time repeated START condition

0.6

µs

tCLK-LP

CLK low period

1.3

µs

tCLK-HP

CLK high period

0.6

µs

tSU

Setup time repeated START condition

0.6

µs

tDATA-HOLD

Data hold time

300

ns

tDATA-SU

Data setup time

100

ns

tSU

Setup time for STOP condition

0.6

µs

tTRANS

Maximum pulse width of spikes that must be suppressed by the input filter

of both DATA and CLK signals

50

ns

(1)

All values verified by design.

5.7 Typical Characteristic

-40

80

TEMPERATURE (°C)

-10

-5

0

5

10

60

40

20

0

-20

TA = −40°C to +85°C

VDD = 2.3V to 3V

Figure 5-1. Frequency vs. Temperature

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LP3943

SNVS256E – NOVEMBER 2003 – REVISED OCTOBER 2024

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