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LP5952TL-1.0/NOPB 데이터시트(PDF) 7 Page - Texas Instruments

부품명 LP5952TL-1.0/NOPB
상세설명  LP5952 350-mA Dual-Rail Linear Regulator
PDF  26 Pages
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제조업체  TI2 [Texas Instruments]
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LP5952TL-1.0/NOPB 데이터시트(HTML) 7 Page - Texas Instruments

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SNVS469F – OCTOBER 2006 – REVISED DECEMBER 2015
6.9 Electrical Characteristics: Thermal Protection
Typical values are for TA = 25°C.
(1) (2) (3)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TSHDN
Thermal-shutdown temperature
165
°C
ΔTSHDN
Thermal-shutdown hysteresis
20
°C
(1)
All voltages are with respect to the potential at the GND pin.
(2)
Minimum and maximum limits are ensured by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the
most likely norm. Unless otherwise specified, conditions for typical specifications are: VIN = VOUT(NOM) + 1 V, VBATT = VOUT(NOM) + 1.5 V
or 2.5 V, whichever is higher, TA = 25°C.
(3)
VOUT(NOM) is the stated output voltage option.
6.10 Electrical Characteristics: Transient Characteristics
Unless otherwise noted, typical values are for TA = 25°C, and minimum and maximum limits apply over the full operating
temperature range: –40°C
≤ TJ ≤ +125°C.
(1) (2) (3)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Dynamic line transient
VIN = VOUT(NOM) + 0.3 V to
ΔVOUT
±1
mV
response VIN
VOUT(NOM) + 0.9 V; tr, tf = 10 µs
Dynamic line transient
VBATT = VOUT(NOM) + 1.5 V to
ΔVOUT
±15
mV
response VBATT
VOUT(NOM) + 2.1 V; tr, tf = 10 µs
Pulsed load 0 ...300 mA,
DSBGA
±15
mV
di/dt = 300 mA/1 µs
package
Dynamic load transient
ΔVOUT
response
Pulsed load 0 ...300mA, di/dt
USON package
–35/+15
mV
= 300 mA/1 µs
TSTARTUP Start-up time
EN to 0.95 × VOUT
70
150
µs
(1)
All voltages are with respect to the potential at the GND pin.
(2)
Minimum and maximum limits are ensured by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the
most likely norm. Unless otherwise specified, conditions for typical specifications are: VIN = VOUT(NOM) + 1 V, VBATT = VOUT(NOM) + 1.5 V
or 2.5 V, whichever is higher, TA = 25°C.
(3)
VOUT(NOM) is the stated output voltage option.
6.11 Input and Output Capacitors (Recommended)
All values are for TA = 25°C.
(1) (2) (3)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Capacitance(4)
1.5
2.2
10
µF
COUT
Output capacitance
ESR
3
300
m
Ω
Capacitance(4), not needed in typical post-
0.47
1
µF
regulation application (see Figure 18)
CVIN
Input capacitance at VIN
ESR
3
300
m
Ω
(1)
All voltages are with respect to the potential at the GND pin.
(2)
Minimum and maximum limits are ensured by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the
most likely norm. Unless otherwise specified, conditions for typical specifications are: VIN = VOUT(NOM) + 1 V, VBATT= VOUT(NOM) + 1.5 V
or 2.5 V, whichever is higher, TA = 25°C.
(3)
VOUT(NOM) is the stated output voltage option.
(4)
The capacitor tolerance should be 30% or better over temperature. The full operating conditions for the application should be considered
when selecting a suitable capacitor to ensure that the minimum value of capacitance is always met. Recommended capacitor type is
X7R. However, dependent on application, X5R, Y5V, and Z5U can also be used. The shown minimum limit represents real minimum
capacitance, including all tolerances and must be maintained over temperature and DC bias voltage (See Detailed Design Procedure in
Application and Implementation.)
Copyright © 2006–2015, Texas Instruments Incorporated
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