LS1021ASE7MQB datasheet(4/205 Pages) NXP

4 / 205 page

QorIQ LS1021A Processor Block Diagram

DDR3L/4

Memory

Controller

(HDLC,

TDM,

PB)

Security

(XoR,

CRC)

128 KB

SRAM

512 KB Coherent L2 Cache

32 KB

D Cache

32 KB

I Cache

32 KB

D Cache

32 KB

I Cache

Arm ®

Cortex ®-A7

Core

System Interfaces

System Control

IFC Flash

QuadSPI Flash

1x SD/MMC

2x DUART, 6x LPUART

Internal Boot ROM

Security Monitor

Security Fuses

Power Management

3x I

2 C, 2x SPI, 4x GPIO

4x CAN, 8x FlexTimer/PWM

USB 3.0 w/ PHY

NEON

FPU

Arm ®

Cortex ®-A7

Core

NEON

USB 2.0

2D-ACE LCD Controller

4-Lane 6 GHz SerDes

FPU

Core Complex

Basic Peripherals and Interconnect

Accelerators and Memory Control

Networking Elements

Audio Subsystem:

4x SAI, ASRC, SPDIF

eDMA

qDMA

Cache Coherent Interconnect (CCI-400)

SMMU

2x WDOG

GIC-400

TMU

QUICC

Engine

Figure 1. LS1021A block diagram

2 Pin assignments

LS1021A Ball Map and Pin List

2.1.1 525 ball layout diagrams

This figure shows the complete view of the LS1021A ball map diagram. Figure 3, Figure

4, Figure 5, and Figure 6 show quadrant views.

2.1

Pin assignments

QorIQ LS1021A Data Sheet, Rev. 5, 09/2017

NXP Semiconductors

LS1021ASE7MQB 데이터시트(PDF) 4 Page - NXP Semiconductors

LS1021ASE7MQB 데이터시트(HTML) 4 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL