PCM3501ESLASH2K.B datasheet(24/29 Pages) TI2

24 / 29 page

PCM3501

FIGURE 25. 5-Level Delta-Sigma Modulator Block Digram.

Out

64f

18-Bit

5-level Quantizer

–

Z–1

–

Z–1

shaper consists of five integrators which use a switched-

capacitor topology, a comparator, and a feedback loop con-

sisting of a one-bit DAC. The delta-sigma modulator shapes

the quantization noise, shifting it out of the audio band in the

frequency domain. The high order of the modulator enables

it to randomize the modulator outputs, reducing idle tone

levels.

The 64fS one-bit data stream from the modulator is con-

verted to 1fS, 16-bit data words by the decimation filter,

which also acts as a low-pass filter to remove the shaped

quantization noise. The DC components can be removed by

a high-pass filter function contained within the decimation

filter.

DAC SECTION

The delta-sigma DAC section of PCM3501 is based on a 5-

level amplitude quantizer and a 3rd-order noise shaper. This

section converts the oversampled input data to 5-level delta-

sigma format. A block diagram of the 5-level delta-sigma

modulator is shown in Figure 25. This 5-level delta-sigma

modulator has the advantage of stability and clock jitter

sensitivity over the typical one-bit (2 level) delta-sigma

modulator. The combined oversampling rate of the delta-

sigma modulator and the internal 8x interpolation filter is

64fS for a 512fS system clock.

PCM3501E/2K.B 데이터시트(PDF) 24 Page - Texas Instruments