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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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S25FL256SDPNFVC 데이터시트(PDF) 60 Page - Cypress Semiconductor |
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S25FL256SDPNFVC 데이터시트(HTML) 60 Page - Cypress Semiconductor |
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60 / 149 page  Document Number: 001-98283 Rev. *M Page 59 of 148 S25FL128S/S25FL256S 8.3 Block Protection The Block Protect bits (Status Register bits BP2, BP1, BP0) in combination with the Configuration Register TBPROT bit can be used to protect an address range of the main flash array from program and erase operations. The size of the range is determined by the value of the BP bits and the upper or lower starting point of the range is selected by the TBPROT bit of the configuration register. When Block Protection is enabled (i.e., any BP2-0 are set to 1), Advanced Sector Protection (ASP) can still be used to protect sectors not protected by the Block Protection scheme. In the case that both ASP and Block Protection are used on the same sector the logical OR of ASP and Block Protection related to the sector is used. Recommendation: ASP and Block Protection should not be used concurrently. Use one or the other, but not both. Table 41. Upper Array Start of Protection (TBPROT = 0) Status Register Content Protected Fraction of Memory Array Protected Memory (kbytes) BP2 BP1 BP0 FL128S 128 Mb FL256S 256 Mb 00 0 None 0 0 0 0 1 Upper 64th 256 512 0 1 0 Upper 32nd 512 1024 0 1 1 Upper 16th 1024 2048 1 0 0 Upper 8th 2048 4096 1 0 1 Upper 4th 4096 8192 1 1 0 Upper Half 8192 16384 1 1 1 All Sectors 16384 32768 Table 42. Lower Array Start of Protection (TBPROT = 1) Status Register Content Protected Fraction of Memory Array Protected Memory (kbytes) BP2 BP1 BP0 FL128S 128 Mb FL256S 256 Mb 00 0 None 0 0 0 0 1 Lower 64th 256 512 0 1 0 Lower 32nd 512 1024 0 1 1 Lower 16th 1024 2048 1 0 0 Lower 8th 2048 4096 1 0 1 Lower 4th 4096 8192 1 1 0 Lower Half 8192 16384 1 1 1 All Sectors 16384 32768 |
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