AM53C94JC datasheet(27/63 Pages) AMD

27 / 63 page

P R E L I M I N A R Y

AMD

Am53C94/Am53C96

Current FIFO/Internal State Register (07H) Read

Current FIFO/Internal State Register

CFISREG

Address: 07H

Type: Read

76543

210

IS2

IS1

IS0

CF4

CF3

CF2

CF1

CF0

0000

000

Internal State 2:0

Current FIFO 4:0

16506C-26

This register has two fields, the Current FIFO field and

the Internal State field.

CFISREG – Bits 7:5 – IS 2:0 – Internal State 2:0

The Internal State Register (ISREG) tracks the progress

of a sequence-type command.

The IS 2:0 bits are duplicated from the IS 2:0 field in the

Internal State Register (ISREG) in the normal mode. If

the device is in the test mode, IS 0 is set to indicate that

the offset value is non zero. A non zero value indicates

that synchronous data transfer can continue. A zero

value indicates that the synchronous offset count has

been reached and no more data can be transferred until

an acknowledge is received.

CFISREG – Bits 4:0 – CF 4:0 – Current FIFO 4:0

The CF 4:0 bits are the binary coded value of the num-

ber of bytes in the FIFO. These bits should not be read

when the device is transferring data since this count

may not be stable.

Synchronous Offset Register (07H) Write

Synchronous Offset Register

SOFREG

Address: 07H

Type: Write

76543

210

SO3

SO2

SO1

SO0

RES

xxxx

Reserved

Synchronous Offset 3:0

Reserved

16506C-27

The Synchronous Offset Register (SOFREG) contains

a 4-bit count of the number of bytes that can be sent to

(or received from) the SCSI bus without an

ACK (or

REQ). Bytes exceeding the threshold will be sent one

byte at a time (asynchronously). That is, each byte will

require an

ACK/REQ handshake. To set up an asyn-

chronous transfer, the SOFREG is set to zero. The

SOFREG is set to zero after a hard or soft reset.

SOFREG – Bits 7:4 – RES – Reserved

SOFREG – Bits 3:0 – SO 3:0 – Synchronous Offset

3:0

The SO 4:0 bits are the binary coded value of the num-

ber of bytes that can be sent to (or received from) the

SCSI bus without an

ACK (or REQ) signal.

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