TLF5863

April 1990

DP8482A 100k ECL to TTL Level Translator with Latch

General Description

This circuit translates ECL input levels to TTL output levels

and provides a fall-through latch The TRI-STATE

outputs

are designed to drive standard 50 pF loads The strobe and

chip select inputs operate at ECL levels

Features

Y

16-pin DIP or SO

Y

TRI-STATE outputs

Y

ECL control inputs

Y

8 ns typical propagation delay with 50 pF load

Y

Outputs are TRI-STATE during power updown for

glitch free operation

Y

100k ECL input compatible

Logic and Connection Diagram

Dual-In-Line Package

TLF5863 – 1

Top View

Truth Table

DQ

STR

CS

HL

L

L

LH

L

L

XQ

HL

X

Hi-Z

X

H

Order Number DP8482AJ DP8482AM or DP8482AN

See NS Package Number J16A N16A or M16B

TRI-STATE

is a registered trademark of National Semiconductor Corp

C1995 National Semiconductor Corporation

RRD-B30M115Printed in U S A