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STM32F412RGY7PTR 데이터시트(PDF) 79 Page - STMicroelectronics |
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STM32F412RGY7PTR 데이터시트(HTML) 79 Page - STMicroelectronics |
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79 / 201 page ![]() DocID028087 Rev 7 79/201 STM32F412xE/G Electrical characteristics 166 6.1.6 Power supply scheme Figure 21. Power supply scheme 1. To connect PDR_ON pin, refer to Section: Power supply supervisor. 2. The 4.7 µF ceramic capacitor must be connected to one of the VDD pin. 3. VCAP_2 pad is only available on 100-pin and 144-pin packages. 4. VDDA=VDD and VSSA=VSS. 5. VDDUSB is a dedicated independent USB power supply for the on-chip full-speed OTG PHY module and associated DP/DM GPIOs. VDDUSB value does not depend on the VDD and VDDA values, but it must be the last supply to be provided and the first to disappear. Caution: Each power supply pair (for example VDD/VSS, VDDA/VSSA) must be decoupled with filtering ceramic capacitors as shown above. These capacitors must be placed as close as possible to, or below, the appropriate pins on the underside of the PCB to ensure good operation of the device. It is not recommended to remove filtering capacitors to reduce PCB size or cost. This might cause incorrect operation of the device. |
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