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SN65MLVD2 데이터시트(PDF) 8 Page - Texas Instruments |
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SN65MLVD2 데이터시트(HTML) 8 Page - Texas Instruments |
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8 / 23 page ![]() www.ti.com VA VB VID C 15pF L VO 0V 90% 10% 0.8V 1.2V VA VB VID VO tPHL tPLH tf tr 0.4V -0.4V VOL VCC VOH 2 SN65MLVD2 SN65MLVD3 SLLS767 – NOVEMBER 2006 A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, Frequency = 1 MHz, duty cycle = 50 ± 5%. C L is a combination of a 20%-tolerance, low-loss ceramic, surface-mount capacitor and fixture capacitance within 2 cm of the D.U.T. B. The measurement is made on test equipment with a –3dB bandwidth of at least 1 GHz. Figure 2. Receiver Timing Test Circuit and Waveforms 8 Submit Documentation Feedback |
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