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STM32F429NET7XXX 데이터시트(PDF) 96 Page - STMicroelectronics

부품명 STM32F429NET7XXX
상세설명  ARM Cortex-M4 32b MCUFPU, 225DMIPS, up to 2MB Flash/2564KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 comm. interfaces, camera & LCD-TFT
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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STM32F429NET7XXX 데이터시트(HTML) 96 Page - STMicroelectronics

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Electrical characteristics
STM32F427xx STM32F429xx
96/231
DocID024030 Rev 6
6.3.2
VCAP1/VCAP2 external capacitor
Stabilization for the main regulator is achieved by connecting an external capacitor CEXT to
the VCAP1/VCAP2 pins. CEXT is specified in Table 19.
Figure 24. External capacitor CEXT
1. Legend: ESR is the equivalent series resistance.
6.3.3
Operating conditions at power-up / power-down (regulator ON)
Subject to general operating conditions for TA.
Table 20. Operating conditions at power-up / power-down (regulator ON)
6.3.4
Operating conditions at power-up / power-down (regulator OFF)
Subject to general operating conditions for TA.
Table 19. VCAP1/VCAP2 operating conditions(1)
1. When bypassing the voltage regulator, the two 2.2 µF VCAP capacitors are not required and should be
replaced by two 100 nF decoupling capacitors.
Symbol
Parameter
Conditions
CEXT
Capacitance of external capacitor
2.2 µF
ESR
ESR of external capacitor
< 2
Ω
Symbol
Parameter
Min
Max
Unit
tVDD
VDD rise time rate
20
∞
µs/V
VDD fall time rate
20
∞
Table 21. Operating conditions at power-up / power-down (regulator OFF)(1)
1. To reset the internal logic at power-down, a reset must be applied on pin PA0 when VDD reach below
1.08 V.
Symbol
Parameter
Conditions
Min
Max
Unit
tVDD
VDD rise time rate
Power-up
20
∞
µs/V
VDD fall time rate
Power-down
20
∞
tVCAP
VCAP_1 and VCAP_2 rise time rate Power-up
20
∞
VCAP_1 and VCAP_2 fall time rate
Power-down
20
∞



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