PIC16F570-ISLASHSP datasheet(55/129 Pages) MICROCHIP

55 / 129 page

 2013-2014 Microchip Technology Inc.

DS40001684E-page 55

PIC16F570

EQUATION 9-1:

ACQUISITION TIME EXAMPLE

FIGURE 9-1:

ANALOG INPUT MODULE

Note 1: The charge holding capacitor (CHOLD) is

not discharged after each conversion.

2: The maximum recommended impedance

for analog sources is 10 k

. This is

required to meet the pin leakage

specification.

Assumptions:

Temperature = 50°C and external impedance of 10 k

 5.0V VDD

Tacq

= Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient

=TAMP + TC + TCOFF

s + TC + [(Temperature - 25°C)(0.05 s/°C)]

Solving for Tc:

= CHOLD (RIC + RSS + RS) In(1/512)

= -25pF (l k

 + 7 k + 10 k ) In(0.00196)

=2.81

s

Therefore:

Tacq

= 2

s + 2.81 s + [(50°C-25°C)(0.0 5s/°C)]

=6.06

s

CPIN

ANx

5 pF

VDD

VT = 0.6V

I LEAKAGE

RIC

 1k

Sampling

Switch

SS Rss

CHOLD = 25 pF

VSS/VREF-

Sampling Switch

567 8 9 10 11

)

VDD

± 500 nA

RSS

Legend:

CPIN

= Input Capacitance

= Threshold Voltage

ILEAKAGE

= Leakage current at the pin due

to various junctions

RIC

= Interconnect Resistance

= Sampling Switch

CHOLD

= Sample/Hold Capacitance

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