I/O

Control

Interface

SCL

SDA

Temperature

Register

Configuration

Register

T

LOW

Register

T

HIGH

Register

Pointer

Register

SCL

SDA

GND

V+

C

F

10nF

³

R

F

5k

£

W

SupplyVoltage

TMP103

16

TMP103

SBOS545D – FEBRUARY 2011 – REVISED DECEMBER 2018

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Copyright © 2011–2018, Texas Instruments Incorporated

NOTE

If the bus contains an incomplete sequence of TMP103 device addresses, the master

must transmit all required dummy bytes for the missing device address to allow for normal

MDA read operation. For example, if the TMP103A, TMP103B, and TMP103D devices are

on the bus, the master must transmit an MDA read address followed by four bytes and

four acknowledges to complete the MDA read transaction.

7.5.15 NOISE

The TMP103 is a very low-power device and generates very low noise on the supply bus. Applying an RC filter

to the V+ pin of the TMP103 can further reduce any noise the TMP103 might propagate to other components. RF

in Figure 14 should be less than 5 k

Ω and CF should be greater than 10 nF.

Figure 14. Noise Reduction

7.6 Register Maps

7.6.1 Pointer Register

Figure 15 shows the internal register structure of the TMP103. The 8-bit Pointer Register of the device is used to

address a given data register. The Pointer Register uses the two LSBs to identify which of the data registers

should respond to a read or write command. Table 3 identifies the bits of the Pointer Register byte. During a

write command, P2 through P7 must always be 0. Table 4 describes the pointer address of the registers

available in the TMP103. Power-up reset value of P1/P0 is 00. By default, the TMP103 reads the temperature on

power up.

Figure 15. Internal Register Structure