UCC2912

UCC3912

PROGRAMMABLE HOT SWAP POWER MANAGER

SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003

5

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pin description (continued)

SHTDWN: When this pin is brought to a logic low, the IC is put into a sleep mode drawing typically less than

1

µA of ICC. The input threshold is hysteretic, allowing the user to program a startup delay with an external RC

circuit.

VIN: Input voltage to the UCC3912. The recommended voltage range is 3 V to 8 V. Both VIN pins should be

connected together and to the power source.

VOUT: Output voltage from the UCC3912. When switched the output voltage will be approximately

VIN − (0.15 Ω × IOUT). Both VOUT pins should be connected together and to the load.

APPLICATION INFORMATION

UDG-99171

NOTE: For demonstration board schematic see Design Note DN-58 (TI Literature Number SLUA187).

6

7

8

9

11

10

B0

B1

B2

B3

IMAX

16

3

2

4

12

13

5

14

15

1

SHTDWN

VOUT

VIN

FAULT

CT

GND

HEAT SINK

GND PINS

RL

COUT

VOUT

CSD

RSD

VIN

CIN

R1

LED

D1

CT

S1

S2

S3

S4

S5

DIP

SWITCH

S6

VIN

VIN

UCC2912

UCC3912

Figure 1. Evaluation Circuit

protecting the UCC3912 from voltage transients

The parasitic inductance associated with the power distribution can cause a voltage spike at VIN if the load

current is suddenly interrupted by the UCC3912. It is important to limit the peak of this spike to less than 8 V

to prevent damage to the UCC3912. This voltage spike can be minimized by:

D Reducing the power distribution inductance (e.g., twist the positive and negative leads of the power supply

feeding VIN, locate the power supply close to the UCC3912, use a PCB ground plane,...etc.).

D Decoupling VIN with a capacitor, CIN (refer to Figure 1), located close to pins 2 and 3. This capacitor is

typically less than 1

µF to limit the inrush current.

D Clamping the voltage at VIN below 8 V with a zener diode, D1 (refer to Figure 1), located close to pins 2

and 3.