SY75608/612

DS20006363D-page 24

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2021 - 2023 Microchip Technology Inc. and its subsidiaries

FIGURE 5-2:

Output Enable.

The Output Impedance Select pin is an asynchronous control input that selects between 100Ω (OUT_IMP_SEL tied low)

and 85Ω (OUT_IMP_SEL tied high).

5.2

I2C Bus Control Mode

The SY75608 and SY75612 are controlled via four pin I2C Bus client interface as shown in Figure 5-3.

FIGURE 5-3:

I2C Bus Client Interface.

The address selection is done via SA_0 and SA_1 hardware pins that select the appropriate address for the device.

INx_n

INx_p

INx_p - INx_n

OExb

OUTx_n

OUTx_p

OUTx_n

OUTx_p

If OExb are selected to tristate outputs

If OExb are selected to pull-low through

series termina on resistor (HCSL default)

OUTx_n

OUTx_p

If OExb are selected to drive low

I/O delay

TABLE 5-2:

I2C BUS ADDRESS

SA_1

SA_0

I2C Bus Address

0

0

0x34

0

1

0x35

1

0

0x36

1

1

0x37

SCL

SDA

SA_0

SA_1

MCHP Device