전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

TVP5146M2IPFPR 데이터시트(PDF) 95 Page - Texas Instruments

부품명 TVP5146M2IPFPR
상세설명  NTSC/PAL/SECAM 4×10-Bit Digital Video Decoder With Macrovision™ Detection, YPbPr Inputs, 5-Line Comb Filter, and SCART Support
PDF  109 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

TVP5146M2IPFPR 데이터시트(HTML) 95 Page - Texas Instruments

Back Button TVP5146M2IPFPR Datasheet HTML 91Page - Texas Instruments TVP5146M2IPFPR Datasheet HTML 92Page - Texas Instruments TVP5146M2IPFPR Datasheet HTML 93Page - Texas Instruments TVP5146M2IPFPR Datasheet HTML 94Page - Texas Instruments TVP5146M2IPFPR Datasheet HTML 95Page - Texas Instruments TVP5146M2IPFPR Datasheet HTML 96Page - Texas Instruments TVP5146M2IPFPR Datasheet HTML 97Page - Texas Instruments TVP5146M2IPFPR Datasheet HTML 98Page - Texas Instruments TVP5146M2IPFPR Datasheet HTML 99Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 95 / 109 page
background image
t1
DATACLK
Y, C, AVID, VS, HS, FID
t4
t2
t3
t5
VOH
VOL
Valid Data
Valid Data
VOH
VOL
t5
Stop
Start
VC1 (SDA)
t1
t6
t7
t2
t8
t3
t4
t6
VC0 (SCL)
Data
Stop
Change
Data
TVP5146M2
www.ti.com
SLES141H
– JULY 2005 – REVISED FEBRUARY 2012
3.7
Clocks, Video Data, Sync Timing
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Duty cycle, DATACLK
45
50
55
%
t1
High time, DATACLK
18.5
ns
t2
Low time, DATACLK
18.5
ns
t3
Fall time, DATACLK
90% to 10%
4
ns
t4
Rise time, DATACLK
10% to 90%
4
ns
Commercial
10
t5
Output delay time
ns
Industrial
12
Figure 3-1. Clocks, Video Data, and Sync Timing
3.8
I
2C Host Port Timing
PARAMETER
MIN
TYP
MAX
UNIT
t1
Bus free time between STOP and START
1.3
µs
t2
Data hold time
0
0.9
µs
t3
Data setup time
100
ns
t4
Setup time for a (repeated) START condition
0.6
µs
t5
Setup time for a STOP condition
0.6
ns
t6
Hold time (repeated) START condition
0.6
µs
t7
Rise time VC1(SDA) and VC0(SCL) signal
250
ns
t8
Fall time VC1(SDA) and VC0(SCL) signal
250
ns
Cb
Capacitive load for each bus line
400
pF
fI2C
I2C clock frequency
400
kHz
Figure 3-2. I2C Host Port Timing
Copyright
© 2005–2012, Texas Instruments Incorporated
Electrical Specifications
95
Submit Documentation Feedback
Product Folder Link(s): TVP5146M2



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com