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DP83849CVS/NOPB.A 데이터시트(PDF) 38 Page - Texas Instruments

부품명 DP83849CVS/NOPB.A
상세설명  DP83849C PHYTER® DUAL Commercial Temperature Dual Port 10/100 Mb/s Ethernet Physical Layer Transceiver
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
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DP83849CVS/NOPB.A 데이터시트(HTML) 38 Page - Texas Instruments

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5.4 Power Feedback Circuit
To ensure correct operation for the DP83849C, parallel
caps with values of 10
µF and 0.1 µF should be placed
close to pin 31 (PFBOUT) of the device. Pin 7 (PFBIN1),
pin 28 (PFBIN2), pin 34 (PFBIN3) and pin 54 (PFBIN4)
must be connected to pin 31 (PFBOUT), each pin requires
a small capacitor (.1
µF). See Figure 14 below for proper
connections.
Table 15. 50 MHz Oscillator Specification
Parameter
Min
Typ
Max
Units
Condition
Frequency
50
MHz
Frequency
Tolerance
+50
ppm
Operational Temperature
Frequency
Stability
+50
ppm
Operational Temperature
Rise / Fall Time
6
nsec
20% - 80%
Jitter
8001
psec
Short term
Jitter
8001
psec
Long term
Symmetry
40%
60%
Duty Cycle
1 This limit is provided as a guideline for component selection and to guaranteed by production testing.
Refer to AN-1548, “PHYTER 100 Base-TX Reference Clock Jitter Tolerance,“ for details on jitter performance.
Table 16. 25 MHz Crystal Specification
Parameter
Min
Typ
Max
Units
Condition
Frequency
25
MHz
Frequency
Tolerance
+50
ppm
Operational Tem-
perature
Frequency
Stability
+50
ppm
1 year aging
Load Capacitance
25
40
pF
.1
µF
10
µF
Pin 31 (PFBOUT)
.1
µF
.1
µF
Pin 7 (PFBIN1)
Pin 28 (PFBIN2)
+
-
.1
µF
.1
µF
Pin 34 (PFBIN3)
Pin 54 (PFBIN4)
Figure 14. Power Feeback Connection



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