ISO7310C, ISO7310FC

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SLLSEI8D – JUNE 2014 – REVISED APRIL 2015

6.7 Electrical Characteristics

VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IOH = –4 mA; see Figure 9

VCC2 – 0.5

3

VOH

High-level output voltage

V

IOH = –20 μA; see Figure 9

VCC2 – 0.1

3.3

IOL = 4 mA; see Figure 9

0.2

0.4

VOL

Low-level output voltage

V

IOL = 20 μA; see Figure 9

0

0.1

VI(HYS)

Input threshold voltage hysteresis

450

mV

IIH

High-level input current

IN = VCC

10

μA

IIL

Low-level input curre

IN = 0 V

-10

μA

CMTI

Common-mode transient immunity

VI = VCC or 0 V; see Figure 11

25

50

kV/

μs

SUPPLY CURRENT (All inputs switching with square wave clock signal for dynamic ICC measurement)

ICC1

0.2

0.4

DC Input: VI = VCC or 0 V,

DC to 1 Mbps

AC Input: CL = 15pF

ICC2

1.2

1.8

ICC1

0.3

0.5

Supply current for VCC1 and VCC2

10 Mbps

CL = 15pF

mA

ICC2

1.6

2.2

ICC1

0.5

0.8

25 Mbps

CL = 15pF

ICC2

2.1

3

6.8 Switching Characteristics

VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH, tPHL

Propagation delay time

22

36

67

ns

See Figure 9

PWD(1)

Pulse width distortion |tPHL – tPLH|

3.5

ns

tsk(pp)

(2)

Part-to-part skew time

28

ns

tr

Output signal rise time

3.2

ns

See Figure 9

tf

Output signal fall time

2.7

ns

tfs

Fail-safe output delay time from input power loss

See Figure 10

7.4

μs

(1)

Also known as pulse skew.

(2)

tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

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