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LMC7221 데이터시트(PDF) 2 Page - Texas Instruments

부품명 LMC7221
상세설명  LMC7221 Tiny CMOS Comparator with Rail-To-Rail Input and Open Drain Output
PDF  24 Pages
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LMC7221 데이터시트(HTML) 2 Page - Texas Instruments

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LMC7221
SNOS748E – SEPTEMBER 1999 – REVISED MARCH 2013
www.ti.com
Absolute Maximum Ratings
(1)
ESD Tolerance (2)
2 kV
Differential Input Voltage
V+ +0.3V, V−
−0.3V
Voltage at Input
V+ +0.3V, V−
−0.3V
Voltage at Output Pin
15V
Supply Voltage (V+–V−)
16V
Current at Input Pin (3)
±5 mA
Current at Output Pin(4) (5)
±30 mA
Current at Power Supply Pin
40 mA
Lead Temperature (soldering, 10 sec.)
260°C
Junction Temperature (6)
150°C
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2)
Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
(3)
All limits are specified by testing or statistical analysis.
(4)
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA may adversely affect reliability.
(5)
Limiting input pin current is only necessary for input voltages which exceed the absolute maximum input voltage rating.
(6)
The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
Operating Ratings
(1)
Supply Voltage
2.7
≤ VCC ≤ 15V
Temperature Range (2)
LMC7221AI, LMC7221BI
−40°C to +85°C
Thermal Resistance (
θJA)
8-Pin SOIC
180°C/W
5-Pin SOT-23
325°C/W
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2)
The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
2.7V Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C, V
+ = 2.7V, V− = 0V, V
CM = VO = V
+/2. Boldface limits apply at the
temperature extremes.
Parameter
Test Conditions
LMC7221AI
LMC7221BI
Units
Typ(1)
Limit(2)
Limit(2)
VOS
Input Offset Voltage
3
5
15
mV
8
18
max
TCVOS
Input Offset Voltage
1.0
μV/°C
Temperature Drift
Input Offset Voltage Average
(3)
3.3
μV/Month
Drift
IB
Input Current
0.04
pA
IOS
Input Offset Current
0.02
pA
CMRR
Common Mode Rejection Ratio
0V
≤ VCM ≤ 2.7V
75
dB
PSRR
Power Supply Rejection Ratio
2.7V
≤ V+ ≤ 15V
80
dB
(1)
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(2)
All limits are specified by testing or statistical analysis.
(3)
CL includes the probe and test jig capacitance.
2
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Product Folder Links: LMC7221



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