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TMP20 데이터시트(PDF) 13 Page - Texas Instruments |
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TMP20 데이터시트(HTML) 13 Page - Texas Instruments |
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13 / 28 page ![]() VOUT V+ NC GND GND NC 13 TMP20 www.ti.com SBOS466B – DECEMBER 2009 – REVISED DECEMBER 2018 Product Folder Links: TMP20 Submit Documentation Feedback Copyright © 2009–2018, Texas Instruments Incorporated 9 Power Supply Recommendations The low supply current and supply range of 1.8 V to 5.5 V enable the TMP20 to be powered from multiple supply sources. Power supply bypassing is optional and is typically dependent on the noise of the power supply. In noisy systems, adding bypass capacitors may be necessary to decrease the noise that couples to the output of the TMP20. 10 Layout 10.1 Layout Guidelines The substrate on the TMP20AIDCK package is directly connected through conductive epoxy to the flag that connects pin 2 on the lead frame. Consequently, pin 2 is the best lead for a conductive thermal connection to the TMP20 die. The optimal electrical connection for this pin is ground (GND). CAUTION Do not attempt to connect pin 2 (DCK package) to any electrical potential other than ground. If it is not possible to connect pin 2 to ground, it is possible to electrically isolate this pin (that is, leave it floating). Take care when electrically isolating this pin because any noise or electromagnetic interference or radio frequency interference (EMI or RFI) spikes that couple in through this pin can cause erroneous temperature results. shows a proper layout of the TMP20 with correct electrical and thermal connections to pin 2. 10.2 Layout Example Figure 14 shows a layout of the TMP20 with proper electrical and thermal connections to pin 2. Figure 14. TMP20 Layout With Proper Electrical and Thermal Connections |
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