| 전자부품 데이터시트 검색엔진 |
|
MP5016 데이터시트(PDF) 14 Page - Monolithic Power Systems |
|
|
|||||||||||||||||||||||||||||
MP5016 데이터시트(HTML) 14 Page - Monolithic Power Systems |
|
14 / 17 page ![]() MP5016 – 2.7 - 15V, 0.7 - 5A, PROGRAMMABLE, CURRENT-LIMITED SWITCH MP5016 Rev.1.1 www.MonolithicPower.com 14 6/14/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. APPLICATION INFORMATION Setting the Current Limit The MP5016 current limit value should exceed the normal maximum load current, allowing for tolerances in the current sense value. The current limit is a function of the external current limit resistor. Table 1 and Figure 3 list examples of typical current limit values as a function of the resistor value. Table 1: Typical Current Limit vs. Current Limit Resistor (8) RLIMIT (Ω) 3000 1050 604 470 422 ILIMIT (A) 0.75 2 3.5 4.5 5 NOTE: 8) The current limit in Table 1 is a typical value for the reference design. Figure 3: Current Limit vs. Current Limit Resistor The MP5016 current limit can be programmed from 0.7A to 5A by connecting the correct resistor (RLIMIT). The current limit cannot be set too low, because the MP5016 works in sleep mode when the load is lower than 0.38A, typically. The current limit logic is disabled in sleep mode, also. Setting the Over-Voltage Clamp Threshold Drive MODE high to VCC to set the output OVP clamp voltage at 15.2V. Drive MODE low to GND to set the output OVP clamp voltage at 5.75V. Refer to Table 2 to set the MODE high/low digital voltage. Table 2: MODE High/Low Digital Voltage Min. Max. VMODE_HIGH VCC - 0.2V VMODE_LOW 0.2V The OVP threshold can also be set by connecting a resistor from MODE to ground. In this case, the OVP clamp threshold is given by Equation (3): 0.3(V) (KΩ R 0.047 (V) V MODE clamp ) (3) RMODE should be above 68kΩ. For example, an RMODE value of 76.8kΩ can set the OVP clamp threshold to 3.9V. When RMODE is used, place a 39pF capacitor from MODE to GND. Setting the Soft-Start Time The soft-start time is related to the dV/dt slew rate and input voltage and can be calculated with Equation (4): (V/ms) dv/dt Vin(V) t_ss(ms) (4) The dV/dt slew rate is controlled by external DV/DT capacitor setting and MODE setting. Table 3 shows the dV/dt slew rate when DV/DT is floating. Table 3: dV/dt Slew Rate Value when DV/DT is Floating MODE Connection dV/dt Slew Rate (V/ms) Low 0.8 High 2 Float 3.8 RMODE 7ms (V) Vclamp For cases with an external DV/DT capacitor, the dV/dt slew rate can be calculated with Equation (5): DV/DT 6.5(μΑ)K1 dv/dt (V/ms) C(nF) (5) See Table 4 for the K1 factor value. 300 600 1200 900 1500 1800 2400 3000 2100 2700 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |