Description

M24M01-R

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Description

(EEPROM) device organized as 128 Kb × 8 bits.

line. The devices carry a built-in 4-bit device type identifier code (1010) in accordance with

synchronized by the serial clock. Read and Write operations are generated by the bus

master and initiated by a Start condition, followed by the device select code, address bytes

and data bytes. Data transfers are terminated by a Stop condition after an Ack for Write, and

after a NoAck for Read.

time, following the bus master’s 8-bit transmission. When data is read by the bus master, the

bus master acknowledges the receipt of the data byte in the same way.

In order to meet environmental requirements, ST offers the M24M01-R in ECOPACK®

packages. ECOPACK® packages are Lead-free and RoHS compliant.

ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Figure 1.

Logic diagram

Table 1.

Signal names

Signal name

Function

Direction

E1, E2

Chip Enable

Input

SDA

Serial Data

I/O

SCL

Serial Clock

Input

WC

Write Control

Input

Supply voltage

Ground

AI13415b

SDA

VCC

M24M01-R

WC

SCL

VSS

2

E1-E2