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CD4053B 데이터시트(PDF) 19 Page - Texas Instruments |
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CD4053B 데이터시트(HTML) 19 Page - Texas Instruments |
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19 / 25 page ![]() 8.2.3 Application Curve -6 -4 -2 0 2 4 6 V , INPUT SIGNAL VOLTAGE (V) IS -6 -4 -2 0 2 4 6 V = 5V DD V = 0V SS V = -5V EE T = 25 C A o R = 100k , R = 10k L L Ω Ω 100 Ω 500 Ω 1k Ω Figure 8-2. ON Characteristics for 1 of 8 Channels 8.3 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Section 5.5. Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, a 0.1μF bypass capacitor is recommended. If there are multiple pins labeled VCC, then a 0.01μF or 0.022μF capacitor is recommended for each VCC because the VCC pins will be tied together internally. For devices with dual supply pins operating at different voltages, for example VCC and VDD, a 0.1µF bypass capacitor is recommended for each supply pin. It is acceptable to parallel multiple bypass capacitors to reject different frequencies of noise. 0.1μF and 1μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results. www.ti.com CD4053B-Q1 SCHS469 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 19 |
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