CC2560A NRND; CC2564 NRND

13

CC2560A, CC2560B, CC2564, CC2564B

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SWRS121E – JULY 2012 – REVISED JANUARY 2016

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Product Folder Links: CC2560A CC2560B CC2564 CC2564B

Specifications

Copyright © 2012–2016, Texas Instruments Incorporated

(1)

The terms None or Asserted can imply any of the following conditions: directly pulled to ground or driven low, pulled to ground through a

pulldown resistor, or left NC or floating (high-impedance output stage).

5.7.1.3

Power Supplies and Shutdown – Static States

The nSHUTD signal puts the device in ultra-low power mode and performs an internal reset to the device.

The rise time for nSHUTD must not exceed 20

μs; nSHUTD must be low for a minimum of 5 ms.

To prevent conflicts with external signals, all I/O pins are set to the high-impedance (Hi-Z) state during

shutdown and power up of the device. The internal pull resistors are enabled on each I/O pin, as

described in Section 4.1, Pin Attributes. Table 5-1 describes the static operation states.

Table 5-1. Power Modes

VDD_IN (1)

VDD_IO(1)

nSHUTD(1)

PM_MODE

COMMENTS

1

None

None

Asserted

Shut down

I/O state is undefined. No I/O voltages

are allowed on nonfail-safe pins.

2

None

None

Deasserted

Not allowed

I/O state is undefined. No I/O voltages

are allowed on nonfail-safe pins.

3

None

Present

Asserted

Shut down

I/Os are defined as 3-state with internal

pullup or pulldown enabled.

4

None

Present

Deasserted

Not allowed

I/O state is undefined. No I/O voltages

are allowed on nonfail-safe pins.

5

Present

None

Asserted

Shut down

I/O state is undefined.

6

Present

None

Deasserted

Not allowed

I/O state is undefined. No I/O voltages

are allowed on nonfail-safe pins.

7

Present

Present

Asserted

Shut down

I/Os are defined as 3-state with internal

pullup or pulldown enabled.

8

Present

Present

Deasserted

Active

See Section 5.7.1.4, I/O States in

Various Power Modes

(1)

I = input, O = output, Z = Hi-Z, — = no pull, PU = pullup, PD = pulldown, H = high, L = low

5.7.1.4

I/O States in Various Power Modes

CAUTION

Some device I/Os are not fail-safe (see Section 4.1, Pin Attributes). Fail-safe

means that the pins do not draw current from an external voltage applied to the

pin when I/O power is not supplied to the device. External voltages are not

allowed on these I/O pins when the I/O supply voltage is not supplied because

of possible damage to the device.

Table 5-2 lists the I/O states in various power modes.

Table 5-2. I/O States in Various Power Modes

I/O NAME

SHUT DOWN(1)

DEFAULT ACTIVE(1)

DEEP SLEEP (1)

I/O State

Pull

I/O State

Pull

I/O State

Pull

HCI_RX

Z

PU

I

PU

I

PU

HCI_TX

Z

PU

O-H

O

HCI_RTS

Z

PU

O-H

O

HCI_CTS

Z

PU

I

PU

I

PU

AUD_CLK

Z

PD

I

PD

I

PD

AUD_FSYNC

Z

PD

I

PD

I

PD

AUD_IN

Z

PD

I

PD

I

PD

AUD_OUT

Z

PD

Z

PD

Z

PD

TX_DBG

Z

PU

O