CDx4HC640 CDx4HCT640 High-Speed CMOS Logic Octal Three-State Bus

Transceiver, Inverting

1 Features

• Buffered inputs

• Three-state outputs

• Applications in multiple-data-bus architecture

• Fanout (over temperature range)

– Standard outputs : 10 LSTTL loads

– Bus driver outputs : 15 LSTTL loads

• Wide operating temperature range : -55oC to

125oC

• Balanced propagation delay and transition times

• Significant power reduction compared to LSTTL

logic IC's

• HC types

– 2 V to 6 V operation

– High noise immunity: NIL = 30%, NIH = 30% of

VCC at VCC = 5 V

• HCT types

– 4.5 V to 5.5 V operation

– Direct LSTTL input logic compatibility, VIL = 0.8

V(Max), VIH = 2 V(Min)

– CMOS input compatibility, II ≤ 1µA at VOL, VOH

2 Description

The CDx4HC640 and CDx4HCT640 are inverting

octal bus transceivers with 3-state outputs.

Device Information

PART NUMBER

PACKAGE

(1)

BODY SIZE (NOM)

CD54HC640

J (CDIP, 20)

26.92 mm × 6.92 mm

CD74HC640

N (PDIP, 20)

25.4 mm × 6.35 mm

DW (SOIC, 20)

12.80 mm × 7.50 mm

CD54HCT640

J (CDIP, 20)

26.92 mm × 6.92 mm

CD74HCT640

N (PDIP, 20)

25.40 mm × 6.35 mm

DW (SOIC, 20)

12.80 mm × 7.50 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

Functional Block Diagram

CD54HC640, CD74HC640, CD54HCT640, CD74HCT640

SCHS192C – NOVEMBER 1998 – REVISED JULY 2022

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.