DAC7641YSLASH2K datasheet(5/20 Pages) TI2

5 / 20 page

DAC7641

LDAC

DAC Load Strobe, rising-edge triggered.

RST

Reset, rising-edge triggered. Depending on the state

of RSTSEL, the DAC registers are set to either mid-

scale or zero.

RSTSEL

Reset Select. Determines the action of RST. If

HIGH, a RST command will set the DAC registers to

mid-scale. If LOW, a RST command will set the DAC

registers to zero.

VOUT

DAC Voltage Output

VOUT Sense

DAC Output Amplifier Inverting Input. Used to close

the feedback loop at the load.

VSS

Negative Power Supply

AGND

Analog Ground

VCC

Positive Power Supply

VREFH Sense

DAC Reference High Sense Input

VREFH

DAC Reference High Input

VREFL Sense

DAC Reference Low Sense Input

VREFL

DAC Reference Low Input

DGND

Digital Ground

VDD

Positive Power Supply

NAME

DESCRIPTION

DB15

Data Bit 15, MSB

DB14

Data Bit 14

DB13

Data Bit 13

DB12

Data Bit 12

DB11

Data Bit 11

DB10

Data Bit 10

DB9

Data Bit 9

DB8

Data Bit 8

DB7

Data Bit 7

DB6

Data Bit 6

DB5

Data Bit 5

DB4

Data Bit 4

DB3

Data Bit 3

DB2

Data Bit 2

DB1

Data Bit 1

DB0

Data Bit 0, LSB

Chip Select, active low.

R/W

Enabled by CS, controls data read and write from the

input register.

PIN DESCRIPTIONS

PIN CONFIGURATION

NAME

DESCRIPTION

DB15

DB14

DB13

DB12

DB11

DB10

DB9

DB8

OUT Sense

OUT

RSTSEL

RST

LDAC

R/W

DAC7641

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