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ST10F271Z1 데이터시트(PDF) 99 Page - STMicroelectronics

부품명 ST10F271Z1
상세설명  16-bit MCU with 128 Kbyte Flash memory and 12 Kbyte RAM
PDF  185 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F271Z1 데이터시트(HTML) 99 Page - STMicroelectronics

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ST10F271Z1
System reset
99/185
20.9
Reset summary
A summary of the different reset events is reported in the table below.
Table 49.
Reset event
Event
RSTIN
WDTCON flags
min
max
Power-on reset
0
0
N
Asynch.
1 ms (VREG)
1.2 ms
(Reson. + PLL)
10.2 ms
(Crystal + PLL)
-
11
11
0
0
1
N
Asynch.
1 ms (VREG)
-
1
1
1
1
0
1
x
x
FORBIDDEN
x
x
Y
NOT APPLICABLE
Hardware reset
(asynchronous)
0
0
N
Asynch.
500 ns
-
0
1
1
1
0
0
1
N
Asynch.
500 ns
-
0
1
1
1
0
0
0
Y
Asynch.
500 ns
-
0
1
1
1
0
0
1
Y
Asynch.
500 ns
-
0
1
1
1
0
Short hardware
reset
(synchronous) (1)
1
0
N
Synch.
max (4 TCL, 500 ns)
1032 + 12 TCL +
max(4 TCL, 500ns)
00
11
0
1
1
N
Synch.
max (4 TCL, 500 ns)
1032 + 12 TCL +
max(4 TCL, 500ns)
00
11
0
1
0
Y
Synch.
max (4 TCL, 500 ns)
1032 + 12 TCL +
max(4 TCL, 500ns)
00
11
0
Activated by internal logic for 1024 TCL
1
1
Y
Synch.
max (4 TCL, 500 ns)
1032 + 12 TCL +
max(4 TCL, 500ns)
00
11
0
Activated by internal logic for 1024 TCL
Long hardware
reset
(synchronous)
1
0
N
Synch.
1032 + 12 TCL +
max(4 TCL, 500ns)
-
0
11
10
1
1
N
Synch.
1032 + 12 TCL +
max(4 TCL, 500ns)
-
0
11
10
1
0
Y
Synch.
1032 + 12 TCL +
max(4 TCL, 500 ns)
-
01
11
0
Activated by internal logic only for 1024 TCL
1
1
Y
Synch.
1032 + 12 TCL +
max(4 TCL, 500 ns)
-
01
11
0
Activated by internal logic only for 1024 TCL



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