STM32F446VC datasheet(134/202 Pages) STMICROELECTRONICS

134 / 202 page

Electrical characteristics

STM32F446xC/E

134/202

DocID027107 Rev 6

Note:

Refer to the I2S section of RM0390 reference manual for more details on the sampling

frequency (FS).

fMCK, fCK, and DCK values reflect only the digital peripheral behavior. The values of these

parameters might be slightly impacted by the source clock precision. DCK depends mainly

on the value of ODD bit. The digital contribution leads to a minimum value of

(I2SDIV/(2*I2SDIV+ODD) and a maximum value of (I2SDIV+ODD)/(2*I2SDIV+ODD). FS

maximum value is supported for each mode/condition.

tv(WS)

WS valid time

Master mode

5.5

th(WS)

WS hold time

Master mode

tsu(WS)

WS setup time

Slave mode

PCM short pulse Slave mode(3)

th(WS)

WS hold time

Slave mode

PCM short pulse Slave mode(3)

1.5

tsu(SD_MR)

Data input setup time

Master receiver

tsu(SD_SR)

Slave receiver

2.5

th(SD_MR)

Data input hold time

Master receiver

th(SD_SR)

Slave receiver

tv(SD_ST)

Data output valid time

Slave transmitter (after enable edge)

tv(SD_MT)

Master transmitter (after enable edge)

4.5

th(SD_ST)

Data output hold time

Slave transmitter (after enable edge)

th(SD_MT)

Master transmitter (after enable edge)

1. Guaranteed based on test during characterization.

2. The maximum value of 256xFs is 45 MHz (APB1 maximum frequency).

3. Measurement done with respect to I2S_CK rising edge.

Table 66. I2S dynamic characteristics(1) (continued)

Symbol

Parameter

Conditions

Min

Max

Unit

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