TMS320DM647 datasheet(85/167 Pages) TI

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TMS320DM647/TMS320DM648

Digital Media Processor

SPRS372A – MAY 2007 – REVISED JUNE 2007

Table 6-23. Timing Requirements for Reset (see Figure 6-10 and Figure 6-11) (continued)

-720

-900

NO.

UNIT

MIN

MAX

Setup time, boot mode and configuration pins valid before POR high or

tsu(boot)

RESET high(4)

Hold time, boot mode and configuration pins valid after POR high or

th(boot)

RESET high(4)

(4)

AEA[22:11], and UHPIEN are the boot configuration pins during device reset.

Table 6-24. Switching Characteristics Over Recommended Operating Conditions During Reset(1)

(see Figure 6-11)

-720

-900

NO.

PARAMETER

UNIT

MIN

MAX

td(PORH-RSTATH)

Delay time, POR high AND RESET high to RESETSTAT high

(1)

C = 1/CLKIN1 clock frequency in ns.

For Figure 6-10, note the following:

• Z group consists of: all I/O/Z and O/Z pins, except for Low and High group pins. Pins become high

impedance as soon as their respective power supply has reached normal operating conditions. Pins

remain in high impedance until configured otherwise by their respective peripherals.

• Low group consists of: Pins become low as soon as their respective power supply has reached normal

operating conditions. Pins remain low until configured otherwise by their respective peripheral.

• High group consists of: . Pins become high as soon as their respective power supply has reached

normal operating conditions. Pins remain high until configured otherwise by their respective peripheral.

• All peripherals must be enable through software following a power-on reset; for more details, see

Section 6.7.1, Power-on Reset.

• For power-supply sequence requirements, see Section 6.3.1.

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