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TMS320DM647 데이터시트(PDF) 142 Page - Texas Instruments

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부품명 TMS320DM647
상세설명  Digital Media Processor
PDF  167 Pages
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TMS320DM647 데이터시트(HTML) 142 Page - Texas Instruments

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6.18 3-Port Ethernet Switch Subsystem (3PSW)
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372A – MAY 2007 – REVISED JUNE 2007
The Ethernet module controls the flow of packet data between the device and two external Ethernet PHYs
(DM648 only) or one external Ethernet PHY (DM647 only), with hardware flow control and
quality-of-service (QOS) support. See Figure 6-42 for a block diagram of the Ethernet module. The
Ethernet Subsystem contains a 3-port gigabit switch, where one port is internally connected to the C64x+
DSP (via the switched central resource) and the other two ports are brought out externally. Each of the
external Ethernet ports support the modes shown in Table 6-63.
The Ethernet module controls the flow of packet data between the device and two external Ethernet PHYs
, with hardware flow control and quality-of-service (QOS) support. See Figure 6-42 for a block diagram of
the Ethernet module. The Ethernet Subsystem contains a 3-port gigabit switch, where one port is
internally connected to the C64x+ DSP (via the switched central resource) and the other two ports are
brought out externally. Each of the external Ethernet ports support the modes shown in Table 6-63.
Table 6-63. Ethernet Operating Modes
Description
Data Rate
Operating Mode
10Base-T
10 Mbits/second (Mbps)
half- or full-duplex
100Base-T
100 Mbits/second (Mbps)
half- or full-duplex
1000Base-T
1000 Mbits/second (Mbps)
full-duplex
The Ethernet Subsystem provides these functions:
• Ethernet communication/routing by way of two dedicated 10/100/1000 ports with SGMII interfaces
–
Wire-rate switching (802.1d), non-blocking switch fabric
–
Four priority levels of QoS TX support (802.1p) in hardware
–
Programmable interrupt pacing on RX/TX plus interrupt threshold on RX
–
Supports forwarding frame sizes of 64-2020 bytes
• Address Lookup
–
1024 total address lookup engine (ALE) entries of VLANs and/or MAC addresses
–
L2 address lock and L2 filtering support
–
Multicast/broadcast filtering and forwarding state control
–
Receive-based or destination-based multicast and broadcast rate limits
–
MAC address blocking
–
Source port locking
–
OUI (Vendor ID) host accept/deny feature
–
Host controlled time-based aging
–
MAC authentication (802.1x)
–
Remapping of priority level of VLAN or ports
–
Multiple spanning tree support (spanning tree per VLAN)
• VLAN support
–
802.1Q compliant
• Auto add port VLAN for untagged frames on ingress
• Auto VLAN removal on egress and auto pad to minimum frame size
–
Flow control (IEEE 802.3x)
–
Programmable priority escalation to specify delivery of lower priority level packets in the event of
over-subscribed TX high priority traffic
–
Host pass CRC mode (enables CRC protection through host)
–
Write-protect option for Ethernet module registers (3PGSW, CPPI RAM, MDIO, SGMII0, SGMII1,
control)
–
Ethernet statistics:
• EtherStats and 802.3 Stats RMON statistics gathering (shared)
Peripheral Information and Electrical Specifications
142
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