전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ADS1601IPFBT 데이터시트(PDF) 8 Page - Texas Instruments

부품명 ADS1601IPFBT
상세설명  16-Bit, 1.25MSPS Analog-to-Digital Converter
PDF  31 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

ADS1601IPFBT 데이터시트(HTML) 8 Page - Texas Instruments

Back Button ADS1601IPFBT Datasheet HTML 4Page - Texas Instruments ADS1601IPFBT Datasheet HTML 5Page - Texas Instruments ADS1601IPFBT Datasheet HTML 6Page - Texas Instruments ADS1601IPFBT Datasheet HTML 7Page - Texas Instruments ADS1601IPFBT Datasheet HTML 8Page - Texas Instruments ADS1601IPFBT Datasheet HTML 9Page - Texas Instruments ADS1601IPFBT Datasheet HTML 10Page - Texas Instruments ADS1601IPFBT Datasheet HTML 11Page - Texas Instruments ADS1601IPFBT Datasheet HTML 12Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 31 page
background image
CLK
SYNC
t
SSC
t
HSC
FSO
t
C
t
SYPW
t
STL
CLK
FSO
t
CPW
SCLK
t
CS
t
CF
t
FPW
DOUT
t
DS
t
DH
MSB
BIT
14
LSB
NewData
BIT
1
t
CPW
ADS1601
SBAS322D
– DECEMBER 2004 – REVISED OCTOBER 2011
www.ti.com
TIMING DIAGRAMS
Figure 1. Initialization Timing
TIMING REQUIREMENTS
For TA = –40°C to +85°C, DVDD = 2.7V to 3.6V, and IOVDD = 2.7V to 5.25V.
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNIT
tSYPW
SYNC positive pulse width
1
CLK period
tC
Clock period (CLK)
50
ns
tSSC
Setup time; SYNC rising edge to CLK rising edge
0.5
CLK period
tHSC
Hold time; CLK rising edge to SYNC falling edge
0.5
CLK period
Settling time of the ADS1601; FSO falling edge to next
tSTL
833
CLK periods
FSO rising edge
Figure 2. Data Retrieval Timing
TIMING REQUIREMENTS
For TA = –40°C to +85°C, DVDD = 2.7V to 3.6V, and IOVDD = 2.7V to 5.25V.
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNIT
tCS
Rising edge of CLK to rising edge of SCLK
15
ns
tCF
Rising edge of SCLK to rising edge of FSO
5
ns
tCPW
CLK positive or negative pulse width
25
ns
tFPW
Frame sync output high pulse width
1
CLK period
tDS
SCLK rising edge to new DOUT valid
5
ns
tDH
SCLK falling edge to DOUT invalid
20
ns
8
Copyright
© 2004–2011, Texas Instruments Incorporated



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com