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AMC0106M05 데이터시트(PDF) 9 Page - Texas Instruments |
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AMC0106M05 데이터시트(HTML) 9 Page - Texas Instruments |
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9 / 35 page ![]() 5.7 Switching Characteristics PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tH DOUT hold time after rising edge of CLKIN CLOAD = 15pF 12 ns tD Rising edge of CLKIN to DOUT valid delay CLOAD = 15pF 30 ns tr DOUT rise time 10% to 90%, 2.7V ≤ DVDD ≤ 3.6V, CLOAD = 15pF 2.5 6 ns 10% to 90%, 4.5V ≤ DVDD ≤ 5.5V, CLOAD = 15pF 3.2 6 tf DOUT fall time 10% to 90%, 2.7V ≤ DVDD ≤ 3.6V, CLOAD = 15pF 2.2 6 ns 10% to 90%, 4.5V ≤ DVDD ≤ 5.5V, CLOAD = 15pF 2.9 6 tSTART Device start-up time AVDD step from 0 to 3.0V with AVDD ≥ 2.7V to bitstream valid, 0.1% settling 100 µs 5.8 Timing Diagrams CLKIN DOUT t CLKIN t H 10% 90% t HIGH t LOW 50% t D t r / tf Figure 5-1. Digital Interface Timing DOUT CLKIN AVDD tSTART Bitstream not valid (analog settling) Valid bitstream DVDD Figure 5-2. Device Start-Up Timing www.ti.com AMC0106M05 SBASAS7A – AUGUST 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: AMC0106M05 |
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