TSC2012IDT datasheet(48/50 Pages) STMICROELECTRONICS

48 / 50 page

List of figures

Figure 1.

Block diagram .................................................................... 2

Figure 2.

Pin connection (top view) ............................................................. 3

Figure 3.

Supply current vs. supply voltage ...................................................... 10

Figure 4.

Supply current vs. input common mode .................................................. 10

Figure 5.

Supply current vs. temperature ........................................................ 10

Figure 6.

Supply current vs. input common mode with active shutdown mode .............................. 10

Figure 7.

Input bias current vs. input common mode with shutdown active ................................. 11

Figure 8.

Input bias current vs. temperature VCC = 2.7 V ............................................. 11

Figure 9.

Input bias current vs. temperature with VCC = 5 V ........................................... 11

Figure 10.

Input offset voltage vs. temperature..................................................... 11

Figure 11.

Input offset voltage vs. input common mode with VCC = 2.7 V ................................... 12

Figure 12.

Input offset voltage vs. input common mode with VCC = 5 V .................................... 12

Figure 13.

Input offset voltage vs. supply voltage ................................................... 12

Figure 14.

Output current vs. output voltage ...................................................... 12

Figure 15.

Output current vs. temperature with VCC = 5 V ............................................. 13

Figure 16.

Output current vs. temperature with VCC = 2.7 V ............................................ 13

Figure 17.

Voh and Vol vs. input common mode voltage with VCC = 5 V .................................... 13

Figure 18.

(Output voltage + Vref) vs. Vsense unidirectionnal with VCC = 5 V ................................ 13

Figure 19.

(Output voltage + Vref) vs. Vsense bidirectionnal with VCC = 5 V .................................. 14

Figure 20.

Output rail linearity vs. load with VCC = 5 V................................................ 14

Figure 21.

Linearity vs. Vsense with VCC = 5 V ..................................................... 14

Figure 22.

Linearity vs. Vsense and temperature .................................................... 14

Figure 23.

Gain error vs. input common mode ..................................................... 15

Figure 24.

Gain error vs. input common mode and temperature ......................................... 15

Figure 25.

Load regulation with VCC = 5 V ........................................................ 15

Figure 26.

Gain vs. frequency ................................................................ 15

Figure 27.

Gain vs. frequency VCC = 5 V ......................................................... 16

Figure 28.

Gain vs. frequency different capacitive load ............................................... 16

Figure 29.

Gain vs. frequency different capacitive load (TSC2010) ....................................... 16

Figure 30.

Gain vs. frequency different capacitive load (TSC2012) ....................................... 16

Figure 31.

Bandwidth vs. input common mode ..................................................... 17

Figure 32.

Bandwidth vs. input common mode (TSC2010)............................................. 17

Figure 33.

Bandwidth vs. input common mode (TSC2012)............................................. 17

Figure 34.

Overshoot vs. capacitive load ......................................................... 17

Figure 35.

Small signal response with VCC = 5 V ................................................... 18

Figure 36.

Small signal response with VCC = 5 V (TSC2010) ........................................... 18

Figure 37.

Small signal response with VCC = 5 V (TSC2012) ........................................... 18

Figure 38.

Small signal response with VCC= 2.7 V .................................................. 18

Figure 39.

Large signal response with VCC = 5 V ................................................... 19

Figure 40.

Large signal response with VCC = 5 V (TSC2010) ........................................... 19

Figure 41.

Large signal response with VCC = 5 V (TSC2012) ........................................... 19

Figure 42.

Large signal response with VCC = 2.7 V .................................................. 19

Figure 43.

12 V common mode step response recovery .............................................. 20

Figure 44.

50 V common mode step response recovery .............................................. 20

Figure 45.

PSRR vs. frequency ............................................................... 20

Figure 46.

CMRR vs. frequency ............................................................... 20

Figure 47.

Positive overvoltage recovery VCC = 2.7 V ................................................ 21

Figure 48.

Negative overvoltage recovery VCC = 2.7 V ............................................... 21

Figure 49.

Overvoltage recovery vs. Vicm VCC = 5 V ................................................. 21

Figure 50.

Noise vs. frequency................................................................ 21

TSC2010, TSC2011, TSC2012

List of figures

DS13057 - Rev 7

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