7.3.6 Diagnostic Output

As shown in Figure 7-7, the open-drain DIAG pin can be monitored to confirm the device is operational, and the

output data are valid. During power-up, the DIAG pin is actively held low until the high-side supply is in regulation

and the modulator starts outputting data. The DIAG pin is actively pulled low if:

• The low-side does not receive data from the high-side (for example, because of a loss of power on the

high-side). The modulator itself outputs a constant bitstream of logic 0's in this case, that is, the DOUT pin is

permanently low.

• The high-side DC/DC output voltage (DCDC_OUT) or the high-side LDO output voltage (HLDO_OUT) drop

below their respective undervoltage detection thresholds (brown-out). In this case, the low-side may still

receive data from the high-side but the data may not be valid. However, the modulator itself outputs a

constant bitstream of logic 0's in this case, meaning that the DOUT pin is permanently low.

CLKIN

High-side supply undervoltage

DOUT

DIAG

Power-up

Normal

Operation

Normal

Operation

Figure 7-7. DIAG and Output under Different Operating Conditions

7.4 Device Functional Modes

The digital interface, including the open-drain DIAG pin are functional as soon as VDD rises above the VDDPOR

threshold. Analog functions, including the circuitry on the high-side, are enabled as soon as VDD rises above the

analog under voltage lockout threshold VDDUV .

At power-down, analog functions are disabled as VDD falls below the VDDUV (falling) voltage level. The digital

interface, including the open-drain DIAG pin remain functional until VDD drops below the VDDPOR (falling)

voltage level. Figure 7-8 shows the different enable thresholds for the AMC3336.

VDDPOR, rising

full analog functionality

no analog functionality

no analog functionality

Digital Interface &

DIAG pin functional

Digital Interface &

DIAG pin not functional

Digital Interface &

DIAG pin not functional

VDDUV, rising

VDDPOR, falling

VDDUV, falling

VDD

Figure 7-8. AMC3336 Enable Thresholds

Below the VDDPOR voltage level the digital output pins are not actively driven, that is they are in a high-

impedance state but clamped to one diode-voltage above the VDD supply.

AMC3336

SBASA70 – APRIL 2021

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