AMC7836IPAPR datasheet(28/91 Pages) TI2

28 / 91 page

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C020

AMC7836

SLAS986D – NOVEMBER 2014 – REVISED FEBRUARY 2018

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Product Folder Links: AMC7836

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Feature Description (continued)

Figure 50. DAC Clamp Output vs AVSS

A special distinction must be made for DAC group A as the AVSS pin of this group is the dual-function AVEE pin.

Aside from setting the clamp voltage and default output range for the DAC group A, the AVEE pin is also the

lowest potential in the device. As a consequence the AVEE voltage is dependent on the other AVSS pin

connections. The AVEE pin can only be connected to the analog ground if all the other AVSS pins are also

connected to the analog ground. If any of the AVSS pins is connected to a negative voltage, the AVEE pin must

also be connected to that voltage (see Table 1).

The full-scale output range for each DAC group is limited by the corresponding AVCC and AVSS values. The

maximum and minimum outputs cannot exceed the AVCC voltage or be lower than the AVSS voltage, respectively.

Table 1. Recommended DAC Group Configuration

DAC

GROUP

DAC

AUTO-RANGE

AND CLAMP

VOLTAGE

SELECTION

(AVSS)

AVEE = AGND

AVEE = VNEG

OUTPUT RANGE

CLAMP VOLTAGE

CONNECTION

OUTPUT RANGE

CLAMP VOLTAGE

CONNECTION

DAC_A0

AVEE

0 to 5 V or 0 to 10 V

AGND

–5 to 0 V or –10 to 0 V

VNEG

DAC_A1

DAC_A2

DAC_A3

DAC_B4

AVSSB

0 to 5 V or 0 to 10 V

AGND

–5 to 0 V or –10 to 0 V

VNEG ≤ AVSSB ≤ –5 V

DAC_B5

DAC_B6

0 to 5 V or 0 to 10 V

AGND

DAC_B7

DAC_C8

AVSSC

0 to 5 V or 0 to 10 V

AGND

–5 to 0 V or –10 to 0 V

VNEG ≤ AVSSC ≤ –5 V

DAC_C9

DAC_C10

0 to 5 V or 0 to 10 V

AGND

DAC_C11

DAC_D12

AVSSD

0 to 5 V or 0 to 10 V

AGND

–5 to 0 V or –10 to 0 V

VNEG ≤ AVSSD ≤ –5 V

DAC_D13

DAC_D14

0 to 5 V or 0 to 10 V

AGND

DAC_D15

AMC7836IPAPR 데이터시트(PDF) 28 Page - Texas Instruments

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