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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STA382BWSTR 데이터시트(PDF) 125 Page - STMicroelectronics |
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STA382BWSTR 데이터시트(HTML) 125 Page - STMicroelectronics |
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125 / 172 page  STA382BWS Register description: Sound Terminal compatibility Doc ID 022784 Rev 1 125/172 As an example if CH3VOL = 0x00 or +48 dB and MVOL = 0x18 or -12 dB, then the total gain for channel 3 = +36 dB. The master mute, when set to 1, mutes all channels at once, whereas the individual channel mute (CxM) mutes only that channel. Both the master mute and the channel mutes provide a “soft mute” with the volume ramping down to mute in 4096 samples from the maximum volume setting at the internal processing rate (approximately 96 kHz). A “hard (instantaneous) mute” can be obtained by programming a value of 0xFF (255) to any channel volume register or the master volume register. When volume offsets are provided via the master volume register, any channel whose total volume is less than -80 dB is muted. All changes in volume take place at zero-crossings when ZCE = 1 (Configuration register E (addr 0x04)) on a per-channel basis as this creates the smoothest possible volume transitions. When ZCE = 0, volume updates occur immediately. Table 135. Master volume offset as a function of MVOL[7:0] MVOL[7:0] Volume offset from channel value 00000000 (0x00) 0 dB 00000001 (0x01) -0.5 dB 00000010 (0x02) -1 dB …… 01001100 (0x4C) -38 dB …… 11111110 (0xFE) -127.5 dB 11111111 (0xFF) Hard master mute Table 136. Channel volume as a function of CxVOL[7:0] CxVOL[7:0] Volume 00000000 (0x00) +48 dB 00000001 (0x01) +47.5 dB 00000010 (0x02) +47 dB …… 01011111 (0x5F) +0.5 dB 01100000 (0x60) 0 dB 01100001 (0x61) -0.5 dB …… 11010111 (0xD7) -59.5 dB 11011000 (0xD8) -60 dB 11011001 (0xD9) -61 dB 11011010 (0xDA) -62 dB …… 11101100 (0xEC) -80 dB 11101101 (0xED) Hard channel mute …… 11111111 (0xFF) Hard channel mute Obsolete Product(s) - Obsolete Product(s) |
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