List of figures

Figure 1.

Block diagram .................................................................... 2

Figure 2.

Configuration diagram (top view)........................................................ 3

Figure 3.

Current and voltage conventions........................................................ 4

Figure 4.

IOUT/ISENSE versus IOUT ............................................................. 9

Figure 5.

Current sense precision vs. IOUT ...................................................... 10

Figure 6.

Switching times and Pulse skew ....................................................... 10

Figure 7.

TDSTKON ....................................................................... 11

Figure 8.

OFF-state output current ............................................................ 12

Figure 9.

Standby current .................................................................. 12

Figure 10.

IGND(ON) vs. Iout .................................................................. 12

Figure 11.

Logic input high level voltage ......................................................... 12

Figure 12.

Logic input low level voltage .......................................................... 12

Figure 13.

High level logic input current.......................................................... 12

Figure 14.

Low level logic input current .......................................................... 13

Figure 15.

Logic input hysteresis voltage......................................................... 13

Figure 16.

Undervoltage shutdown ............................................................. 13

Figure 17.

On-state resistance vs. Tcase ......................................................... 13

Figure 18.

On-state resistance vs. VCC ......................................................... 13

Figure 19.

Turn-on voltage slope .............................................................. 13

Figure 20.

Turn-off voltage slope .............................................................. 14

Figure 21.

Won vs. Tcase ................................................................... 14

Figure 22.

Woff vs. Tcase ................................................................... 14

Figure 23.

ILIMH vs. Tcase ................................................................... 14

Figure 24.

Turn-off output voltage clamp ......................................................... 14

Figure 25.

OFF-state open-load voltage detection threshold ........................................... 14

Figure 26.

Vs clamp vs. Tcase ................................................................ 15

Figure 27.

Vsenseh vs. Tcase ................................................................. 15

Figure 28.

Application diagram................................................................ 17

Figure 29.

Simplified internal structure .......................................................... 17

Figure 30.

CurrentSense and diagnostic - block diagram .............................................. 19

Figure 31.

CurrentSense block diagram ......................................................... 20

Figure 32.

Analogue HSD – open-load detection in off-state ........................................... 21

Figure 33.

Open-load / short to VCC condition ..................................................... 21

Figure 34.

Octapak on two-layer PCB (2s0p to JEDEC JESD 51-5) ...................................... 23

Figure 35.

Octapak on four-layer PCB (2s2p to JEDEC JESD 51-7) ...................................... 23

Figure 36.

Rthj-amb vs PCB copper area in open box free air conditions .................................... 24

Figure 37.

Octapak thermal impedance junction ambient single pulse ..................................... 24

Figure 38.

Thermal fitting model for Octapak ...................................................... 25

Figure 39.

Octapak package dimensions ......................................................... 26

Figure 40.

Octapack reel 13" ................................................................. 28

Figure 41.

Octapak carrier tape ............................................................... 29

Figure 42.

Octapak schematic drawing of leader and trailer tape ........................................ 29

Figure 43.

Octapak marking information ......................................................... 30

VN7004SLH

List of figures

DS13681 - Rev 2

page 34/35