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L99UDL01 데이터시트(PDF) 68 Page - STMicroelectronics |
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L99UDL01 데이터시트(HTML) 68 Page - STMicroelectronics |
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68 / 88 page ![]() Programmers guide L99UDL01 68/88 DS12511 Rev 5 C/PWM_SW_x The Current PWM Switch bit determines if the output will regulate the motor current directly or just impose a specific PWM duty cycle (voltage regulation) per the OCPx_y bits above. As the driving component, the driver is either regulating to a current level or is PWMming to a specified duty cycle. This only applies to the 6 internal half bridges. The external half bridges are not PWMmable. 6.2.4 Register 06H (external bridge VDS monitor and control) This register sets up the drain source monitoring for the two external half bridges. This register can be read or written to. All new data programmed into this register will be acted upon the rising edge of CSN even during a timed actuation. Three outputs 31 9.2 A 32 9.4 A 33 9.6 A 34 9.8 A 35 10 A 36 10.2 A 37 10.4 A 38 10.6 A 39 10.8 A 40 11 A 41 11.2 A 42 11.4A 43 11.6 A 44 11.8 A 45 12 A Table 42. Current / duty cycle switch bit description C/PWM_SW_x Regulation type 0 Current Regulation 1 Voltage Regulation Table 41. Current bit description (continued) One output Two outputs Three outputs Sum of 1 only Current Sum of 1+2 Current Sum of 1+2+3 Current |
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