L9965TS-TR datasheet(39/62 Pages) STMICROELECTRONICS

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Figure 14. Accessing the FIFO from the same side of the ring

The long frame access allows the MCU to send a single long SPI frame of 40*N bits, where N is the number of

burst responses. In the scenarios described before, if the MCU needs to retrieve the data from the high

transceiver using the long SPI frame, it must send at least one FIFO POP command to update the MISO pointer

from local memory to the FIFO during time interval [t5]. Then, it can generate the long frame of (N+1)*40 bits. The

long frame retrieves the burst request (sent by the low transceiver) during time interval [t6] and the N burst

responses during time interval [t7-t8-…].

Figure 15. Accessing the FIFO from the opposite side of the ring

In a typical application scenario, to perform a burst read on a target device on the VIF bus, the following

procedures must be performed:

Procedure 1: Burst request and response from the same transceiver

1. Send an SPI burst request to the target device along the chain through the transceiver (see Section 5.8.2.2).

2. Wait to receive the N response frames to the burst.

3. Send N SPI commands to pop responses from the FIFO.

L9965T/L9965TS

Functional description

DS14987 - Rev 1

page 39/62

L9965TS-TR 데이터시트(PDF) 39 Page - STMicroelectronics