 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
SPSB100 데이터시트(PDF) 43 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
SPSB100 데이터시트(HTML) 43 Page - STMicroelectronics |
|
|
43 / 213 page  Figure 26. NFSO1 output pin behavior at battery plug Figure 27. NFSO1 output pin behavior after a failure is detected 3.14 Interrupt - IRQ IRQ pin is an open-drain with an internal pull-up for the echo-generation. An external pull-up to VIO level close to MCU is strongly recommended. IRQ pin is set low if any of the following events is happening, as showed in the table below. Table 8. IRQ events SPI status bit name IRQ generated IRQ SPI mask name ABIST_COMPLETE Y Not maskable LBIST_COMPLETE Y Not maskable BOOST_IN_LP Y MASK_BOOST_IN_LP_IRQ BOOST_VDSMON_ERROR Y MASK_BOOST_VDSMON_IRQ BUCK1_OC Y if BUCK1_REGFAIL_GO_REC = 0 MASK_BUCK1_OC_IRQ BUCK1_OV Y if BUCK1_REGFAIL_GO_REC = 0 MASK_BUCK1_IRQ BUCK1_FB Y if BUCK1_REGFAIL_GO_REC = 0 MASK_BUCK1_IRQ SPSB100 Functional description DS14640 - Rev 2 page 43/213 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
