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SPSB100PTR 데이터시트(PDF) 65 Page - STMicroelectronics |
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SPSB100PTR 데이터시트(HTML) 65 Page - STMicroelectronics |
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65 / 213 page ![]() 6 Functional safety concept The device is designed to offer a set of features to support applications that need to fulfill functional safety requirements as defined by ASIL classification in ISO26262-2018. The IC is developed for different applications, hence can be considered a SEooC (safety element out of context) as defined in the normative. Analysis of the IC’s capability to reach the required safety level, should be made at system level under the user's responsibility. 6.1 Safety requirements The SPSB100 must fulfill safety requirements for temperature, output current, output voltage, and system operation as in the following tables based on MCU modes. 6.1.1 MCU in RUN mode The following figure shows the MCU in RUN mode. Figure 38. PMIC + MCU in RUN mode Table 19. Safety requirement list while MCU is in RUN mode ID Description Safety state SR1 While the MCU is in RUN mode the PMIC shall monitor the supply output voltages for the MCU and force a reset of the MCU in case of a voltage error. Output regulators are stopped, NRESET and NFSO pins are asserted. SPSB100 tries to power-up again, if the fault is confirmed for 3 successive power-up then output regulators are stopped, NRESET and NFSO pins are asserted and SPSB100 reaches DEEP-SLEEP state. SR2 While the MCU is in RUN mode the PMIC shall monitor the MCU error pin and force a reset of the MCU based on an error indication. NRESET and NFSO pins are asserted, output regulators are set back to their state resulting from a power-up sequence, then NRESET assertion is maintained for few ms then released. SPSB100 is in RECOVERY-1 state. SPSB100 Functional safety concept DS14640 - Rev 2 page 65/213 |
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