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TDA7569BLVPD 데이터시트(PDF) 29 Page - STMicroelectronics

부품명 TDA7569BLVPD
상세설명  4 x 50 W power amplifier with full I2C diagnostics, high efficiency and low voltage operation
PDF  41 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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TDA7569BLVPD 데이터시트(HTML) 29 Page - STMicroelectronics

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DocID023498 Rev 9
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TDA7569BLV
I2C bus
40
9.3.2
Start and stop conditions
As shown by Figure 40 a start condition is a HIGH to LOW transition of the SDA line while
SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is
HIGH.
9.3.3
Byte format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an
acknowledge bit. The MSB is transferred first.
9.3.4
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse (see Figure 41). The receiver** has to pull-down (LOW) the SDA line during the
acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse.
* Transmitter
–
master (μP) when it writes an address to the TDA7569BLV
–
slave (TDA7569BLV) when the μP reads a data byte from TDA7569BLV
** Receiver
–
slave (TDA7569BLV) when the μP writes an address to the TDA7569BLV
–
master (μP) when it reads a data byte from TDA7569BLV
Figure 39. Data validity on the I2C bus
Figure 40. Timing diagram on the I2C bus
Figure 41. Acknowledge on the I2C bus



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