VNH5050A-E

Block diagram and pin description

Doc ID 16009 Rev 11

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20

CS_DIS

Active high CMOS compatible pin to disable current sense

pin.

21

ENB/DIAGB

Status of high-side and low-side switches B;

Open drain output.

22

INB

Counter clockwise input.

23, 25, 26, 27, 28, 29, 35

OUTB, Heat

Slug3

Source of high-side switch B / drain of low-side switch B.

30, 31, 32, 33, 34,36

GND_B

Source of low-side switch B.

2, 8, 9, 10, 11, 12, 14

OUTA, Heat

Slug2

Source of high-side switch A / drain of low-side switch A.

1, 3, 4, 5, 6, 7

GND_A

Source of low-side switch A.

Table 5.

Pin functions description

Name

Description

VCC

Battery connection.

GND

Power ground.

OUTA

OUTB

Power connections to the motor.

INA

INB

Voltage controlled input pins with hysteresis, CMOS compatible. These two pins

control the state of the bridge in normal operation according to the truth table (brake

to VCC, Brake to GND, clockwise and counterclockwise).

PWM

Voltage controlled input pin with hysteresis, CMOS compatible.Gates of low-side

FETS get modulated by the PWM signal during their on phase allowing speed control

of the motor.

ENA/DIAGA

ENB/DIAGB

Open drain bidirectional logic pins.These pins must be connected to an external pull

up resistor. When externally pulled low, they disable half-bridge A or B. In case of fault

detection (thermal shutdown of a high-side FET or excessive on-state voltage drop

across a low-side FET), these pins are pulled low by the device (see truth table in fault

condition).

CS

Analog current sense output. This output delivers a current proportional to the motor

current if CS_DIS is low or left open. The information can be read back as an analog

voltage across an external resistor.

CS_DIS

Active high CMOS compatible pin to disable the current sense pin.

Table 4.

Pin definitions and functions (continued)

Pin N°

Symbol

Function