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DP83867CSRGZR.B 데이터시트(PDF) 18 Page - Texas Instruments |
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DP83867CSRGZR.B 데이터시트(HTML) 18 Page - Texas Instruments |
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18 / 129 page ![]() 7 Detailed Description 7.1 Overview The DP83867 is a fully featured Physical Layer transceiver with integrated PMD sub-layers to support 10BASE- Te, 100BASE-TX and 1000BASE-T Ethernet protocols. The DP83867 is designed for easy implementation of 10-,100-, and 1000Mbps Ethernet LANs. DP83867 interfaces directly to twisted pair media through an external transformer. This device interfaces directly to the MAC layer through the Reduced GMII (RGMII) or embedded clock Serial GMII (SGMII). The DP83867 provides precision clock synchronization, including a synchronous Ethernet clock output. DP83867 has low jitter, low latency and provides IEEE 1588 Start of Frame Detection for time sensitive protocols. The DP83867 offers remarkable diagnostic features including dynamic link quality monitoring for fault prediction during normal operation. DP83867 can support up to 130m cable length. DP83867CS, DP83867IS, DP83867E SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025 www.ti.com 18 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DP83867CS DP83867IS DP83867E |
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