LP5569 datasheet(51/93 Pages) TI2

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LP5569

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SNVSAP8A – JULY 2017 – REVISED SEPTEMBER 2017

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This is the PWM duty cycle control for the LED7 output.

Figure 46. LED7_PWM Register

pwm7

R/W-0h

Table 35. LED7_PWM Register Field Descriptions

Bit

Field

Type

Reset

Description

7–0

pwm7

R/W

00h = 0% duty cycle (default)

...

80h = 50% duty cycle

...

FFh = 100% duty cycle

8.6.1.21 LED8_PWM Register (Address = 1Eh) [reset = 0h]

LED8_PWM is shown in Figure 47 and described in Table 36.

Return to Summary Table.

LED8 PWM Register

This is the PWM duty cycle control for the LED8 output.

Figure 47. LED8_PWM Register

pwm8

R/W-0h

Table 36. LED8_PWM Register Field Descriptions

Bit

Field

Type

Reset

Description

7–0

pwm8

R/W

00h = 0% duty cycle (default)

...

80h = 50% duty cycle

...

FFh = 100% duty cycle

8.6.1.22 LED0_CURRENT Register (Address = 22h) [reset = AFh]

LED0_CURRENT is shown in Figure 48 and described in Table 37.

Return to Summary Table.

LED0 Current Register

LED0 driver output current control register. The resolution is 8 bits, and step size is 100 μA.

Figure 48. LED0_CURRENT Register

current0

R/W-AFh

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