ONET1130EC datasheet(3/64 Pages) TI2

3 / 64 page

MONB

LOL

TXIN±

TXIN+

GND

MONP

GND

RXIN±

RXIN+

RX_LOS

GND

SDA

SCK

COMP

ONET1130EC

www.ti.com

SLLSEJ3A – JUNE 2015 – REVISED JULY 2015

5 Description (continued)

The ONET1130EC contains internal analog to digital and digital to analog converters to support transceiver

management and eliminate the need for special purpose microcontrollers.

The transceiver is characterized for operation from –40°C to 100°C case temperatures and is available in a small

footprint 4mm × 4mm, 32 pin RoHS compliant VQFN package.

6 Pin Configuration and Function

RSM PACKAGE

32 PIN VQFN

(TOP VIEW)

Pin Functions

NUMBER

NAME

Type

DESCRIPTION

Output amplitude control. Output amplitude can be adjusted by applying a voltage of

AMP

Analog-in

0 to 2 V to this pin. Leave open when not used.

BIAS

Analog

Sinks or sources the bias current for the laser in both APC and open loop modes.

Compensation pin used to control the bandwidth of the APC loop. Connect a 0.01-µF

COMP

Analog

capacitor to ground.

GND

3, 6, 19, 22

Supply

Circuit ground.

Transmitter and receiver loss of lock indicator. High level indicates the transmitter or

LOL

Digital-out

the receiver is out of lock. Open drain output. Requires an external 4.7 k

Ω to 10 kΩ

pull-up resistor to VCC for proper operation. This pin is 3.3 V tolerant.

MONB

Analog-out

Bias current monitor.

MONP

Analog-out

Photodiode current monitor.

Analog

Photodiode input. Pin can source or sink current dependent on register setting.

Disables the receiver output buffer when set to a high level. Includes a 250-k

Ω pull-

RX_DIS

Digital-in

up resistor to VCC. Ground the pin to enable the output. This is an ORed function

with the RXOUT_DIS bit (bit 6 in register 4). This pin is 3.3-V tolerant.

RX_LF

Analog-in

Receiver loop filter capacitor.

Receiver loss of signal. High level indicates that the receiver input signal amplitude is

RX_LOS

Digital-out

below the programmed threshold level. Open drain output. Requires an external 4.7-

Ω to 10-kΩ pull-up resistor to VCC for proper operation. This pin is 3.3-V tolerant.

Non-inverted receiver data input. On-chip differentially 100

Ω terminated to RXIN–.

RXIN+

Analog-in

Must be AC coupled.

Inverted receiver data input. On-chip differentially 100

Ω terminated to RXIN+. Must

RXIN-

Analog-in

be AC coupled.

RXOUT–

CML-out

Inverted receiver data output. 45

Ω back-terminated to VCC.

RXOUT+

CML-out

Non-inverted data output. 45

Ω back-terminated to VCC.

Submit Documentation Feedback

Product Folder Links: ONET1130EC

ONET1130EC 데이터시트(PDF) 3 Page - Texas Instruments

ONET1130EC 데이터시트(HTML) 3 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

데이터시트 다운로드

링크 URL