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IS25LE512M-RLLA3:P-TY 데이터시트(PDF) 59 Page - Integrated Silicon Solution, Inc

부품명 IS25LE512M-RLLA3:P-TY
상세설명  SERIAL FLASH MEMORY 133/112MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
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제조업체  ISSI [Integrated Silicon Solution, Inc]
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IS25LE512M-RLLA3:P-TY 데이터시트(HTML) 59 Page - Integrated Silicon Solution, Inc

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IS25LE512M
IS25WE512M
Integrated Silicon Solution, Inc.- www.issi.com
59
Rev. A6
06/16/2025
8.3 NORMAL READ OPERATION (NORD, 03h or 4NORD, 13h)
The Normal Read (NORD) instruction is used to read memory contents at a maximum frequency of 50MHz.
• 03h (EXTADD=0) is followed by a 3-byte address (A23-A0) or
• 03h (EXTADD=1) is followed by a 4-byte address (A31-A0) or
• 13h is followed by a 4-byte address (A31-A0)
The Normal Read instruction code is transmitted via the SI line, followed by three (A23 - A0) or four (A31
– A0)
address bytes of the first memory location to be read as above. A total of 24 or 32 address bits are shifted in, but
only AVMSB (Valid Most Significant Bit) - A0 are decoded. The remaining bits (A31
– AVMSB+1) are ignored. The first
byte addressed can be at any memory location. Upon completion, any data on the SI will be ignored. Refer to Table
8.5 for the related Address Key.
The first byte data (D7 - D0) is shifted out on the SO line, MSB first. A single byte of data, or up to the whole memory
array, can be read out in one Normal Read instruction. The address is automatically incremented by one after each
byte of data is shifted out. The read operation can be terminated at any time by driving CE# high (VIH) after the
data comes out. When the highest address of the device is reached, the address counter will roll over to the
000000h address, allowing the entire memory to be read in one continuous Read instruction.
If the Normal Read instruction is issued while an Erase, Program or Write operation is in process (WIP=1) the
instruction is ignored and will not have any effects on the current operation.
Table 8.5 Address Key
Mode
Valid Address
512Mb
3 byte address
AVMSB(2)
–A0
A23-A0
4 byte address
A25-A0 (A31-A26=X)(2)
Notes:
1.
X=Don’t Care
2.
AVMSB is a Valid MSB. In 4 byte address for 512Mb, A31 is an MSB, and A25 is a Valid MSB.



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